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Job Description:

Skills and responsibilities:

Utilize commercial and in-house EDA tools (e.g. Synopsys, Cadence, Siemens) for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
Able to handle a full RTL to GDS or Gates to GDS flow, inclusive of all construction stages (e.g. RTL synthesis, placement, clock tree synthesis, detailed routing, physical verification, formal verification and timing analysis).
Proficiency in UNIX/Linux and scripting languages is advantageous.

Required Qualifications:

Degree, Masters or PhD in Electrical/Electronics/Computer engineering.
Minimum of 5 years or more experience in a relevant field.

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, gender identity, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

ASIC Physical Design Engineer - Military Veterans

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