Senior Silicon Validation Engineer - Military Veterans

job summary:

A Senior Silicon Validation Engineer is needed for an American multinational technology company that develops, manufactures, licenses, supports, and sells computer software, consumer electronics, personal computers, and related services in the Mountain View, CA area. The role involves leading validation and testing efforts for complex ASIC and FPGA SoCs, collaborating with cross-functional teams, and improving validation efficiency while mentoring others in the AI Silicon Engineering team.

 

location: Mountain View, California

job type: Contract

salary: $74.35 - 111.52 per hour

work hours: 8am to 5pm

education: Bachelors

 

responsibilities:

• Lead key components of functional validation for complex ASIC and FPGA SoCs.


• Perform Pre-Silicon SoC verification and Post-Silicon/FPGA validation, defining testing strategies.


• Collaborate with cross-functional teams (Architecture, Design, Verification, Partner teams) for project execution and influencing next-generation designs.


• Develop test plans, C tests, and infrastructure to validate complex designs and report bugs/issues.


• Run tests, debug failures, and create stress/performance scenarios to achieve test plan objectives.


• Participate actively in chip bring-up and write test firmware to support various teams.


• Innovate to enhance validation efficiency through methodologies and tools.


• Coach and mentor others in areas of expertise.


• Uphold company core values: Customer Focus, Adaptability, Collaboration, Growth Mindset, Drive for Results, Influence for Impact, Judgement, and Diversity & Inclusion.

Qualifications:

• 10+ years of relevant technical engineering experience.


• Hands-on experience with validation across multiple product cycles, from definition to silicon, including test plan creation, test development, debugging, and tool development for pre-silicon and post-silicon environments.


• strong programming skills in C/C++, SystemVerilog, Assembly, and Python.


• Good understanding of advanced computer architecture and boot flow.


• Experience with high-speed I/Os and industry-standard protocols (Ethernet, PCIe, JTAG, AXI, AHB, I2C).


• Excellent communication skills, team-oriented, self-driven, and problem-solving abilities.

4o

 

qualifications:

• Experience level: Experienced


• Minimum 10 years of experience


• Education: Bachelors (required)

 

skills:

Validation

System Verilog

Testing

FPGA

ASIC

Equal Opportunity Employer: Race, Color, Religion, Sex, Sexual Orientation, Gender Identity, National Origin, Age, Genetic Information, Disability, Protected Veteran Status, or any other legally protected group status.

At Randstad, we welcome people of all abilities and want to ensure that our hiring and interview process meets the needs of all applicants. If you require a reasonable accommodation to make your application or interview experience a great one, please contact HRsupport@randstadusa.com.

Pay offered to a successful candidate will be based on several factors including the candidate's education, work experience, work location, specific job duties, certifications, etc. In addition, Randstad offers a comprehensive benefits package, including health, an incentive and recognition program, and 401K contribution (all benefits are based on eligibility).

This posting is open for thirty (30) days.



Qualified applicants in San Francisco with criminal histories will be considered for employment in accordance with the San Francisco Fair Chance Ordinance.



Qualified applicants in the unincorporated areas of Los Angeles County with criminal histories will be considered for employment in accordance with the Los Angeles County's Fair Chance Ordinance for Employers.



We will consider for employment all qualified Applicants, including those with criminal histories, in a manner consistent with the requirements of applicable state and local laws, including the City of Los Angeles' Fair Chance Initiative for Hiring Ordinance.

Bachelors